
Summary
- Intel developing bLLC: 144 MB L3 cache in Compute Tile to rival AMD’s 3D V-Cache.
- bLLC likely limited to unlocked SKUs (Core Ultra 400K), targeting gamers and overclockers.
- More L3 lets CPU access game data faster; also expect a stronger NPU on Nova Lake-S chips.
Intel has so far chosen to avoid adding one key feature AMD has been using for years to increase the performance of its chips—a larger L3 cache, which actually results in a tangible performance increase in games. This might finally change soon.
According to new reports surrounding Intel’s 2026 hardware lineup, the silicon giant is developing a proprietary technology dubbed “bLLC” (big Last Level Cache) designed to directly counter AMD’s stronghold on the high-performance gaming market. Intel is reportedly integrating a massive 144 MB Last Level Cache directly into the Compute Tile of its upcoming CPUs. Large cache pools have provided rival AMD with its amazing performance gains through their 3D V-Cache technology, and this would clearly be Intel’s attempt to match and beat that.
As a reminder on why that works, in modern computing workloads—particularly in gaming—the speed at which a processor can access instructions and assets is often more critical than raw clock speed. By significantly expanding the L3 cache to (in this case) a reported 144 MB, the Nova Lake-S architecture allows the CPU to store a vast amount of critical data on-chip. When data is stored in the cache, the CPU can access it almost instantly. Conversely, if the data is too large for the cache, the processor must fetch it from the system memory (DRAM). More cache, more info the CPU can access quickly. It’s simple math.
The report indicates that this new cache technology will not be available across the entire Nova Lake lineup. Instead, Intel plans to make bLLC exclusive to its “unlocked SKUs.” This points specifically to the Core Ultra 400K series—the flagship chips traditionally favored by overclockers and hardcore gamers. This would mimic in some ways AMD’s current strategy with its X3D chips, where it will release a non-X3D variant of a new chip with a new architecture and add 3D V-Cache after the fact with X3D variants. 3D V-Cache is not available on all chips, and neither will be bLLC Cache.
The new processors are also expected to feature a significant upgrade to the Neural Processing Unit (NPU) compared to the current Arrow Lake generation. We’ll see these chips next years, and hopefully, these rumors have some weight to them.
Source: Overclock3D